Silicon-on-insulator is the process of fabricating silicon based devices, such as complementary metal oxide semiconductor (CMOS) field effect transistors (FET) on top of a layer of electrically insulating material, such as an oxide. The layer of oxide is on top of a bulk silicon substrate in an integrated circuit (IC) chip and acts as an electrical barrier between the devices (e.g., FETs) and the bulk silicon. The layer of oxide greatly reduces electrical leakage from the devices, but also greatly reduces heat flow from these devices. Accumulation of heat within a device, such as a FET, can reduce the performance and/or useful lifetime of the device.
Heat can be removed from a FET using wiring that is formed over the FET as a heat path for transferring heat away from the FET and out of the top of the chip. Such wiring, however, typically has a primary purpose of carrying electric current within the chip. The electric current generates its own heat within the wiring through resistive heating, and the combination of resistive heating and heat transfer from FETs can degrade the current handling capacity of the wiring.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.